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I2C IP

 

This External I2C IP basically has the same behavior like 8051's internal I2C. The IP provides the interface to EMIF (External Memory Interface) in CME_M5/CME_HR3 or AHB interface in CME_M7 and can be programmed to work as master or as slave.

 

Features

 

  • Comply to Philips I2C bus specification
  • Support multiple bit rate
     - standard mode, up to 100kbit/s
     - fast mode, up to 400kbit/s
     - user-defined bit rate
  • Operating modes
     - Master Transmitter Mode
     - Master Receiver Mode
     - Slave Transmitter Mode
     - Slave Receiver Mode
  • Support 7-bit slave address

 

Block diagram

 



Resource and performance

 

 



Download

 

Doc(.pdf)

 

CME_I2C_user_guide(EN02)

CME_I2C_example_user_guide(EN02)

 

Design(.rar)

 

I2C_example_M5&M7&HR3

 




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